1. Field of the Invention
Embodiments of the present invention relate to DC offset cancellation techniques and, in particular, to DC offset cancellation techniques in devices such as, for example, direct conversion devices.
2. Description of Related Art
The performance of electronic devices such as cellular telephones, personal digital assistants and other wireless and wired devices can be directly affected by the internal components of the devices. For example, the performance of an electronic device is often related to the amount of DC offset in the various components within the device.
In a direct down conversion transceiver, for example, a large DC offset pulse can appear immediately following a gain switching stage in a receiver chain. Traditional techniques for detecting and canceling DC offset pulses generally have transfer functions with very low cutoff frequencies. Thus, using traditional techniques, a rapidly changing DC offset could pass through a circuit unabated, causing transient saturation in subsequent stages before settling to a level that does not affect circuit performance.
The inability of traditional techniques to detect and cancel DC offset pulses in a timely fashion can be detrimental to the performance of circuits within an electronic device and to the overall performance of the device itself. For example, the settling time for some DC offset pulses in some high frequency devices can be as long as 100 microseconds. A settling time of this duration can upset the functionality of many high speed circuits. Indeed, a complete loss of data can occur during a settling period of this length, thereby disrupting operation of the device.
FIG. 1 shows an example of a conventional direct conversion receiver circuit. The circuit receives an input signal RFin and generates I and Q baseband signals BB_I and BB_Q. Downconversion of the input signal is performed by a programmable gain amplifier 100, mixers 102, 104, low pass filters 106, 108, DC offset cancellation elements 110, 112, programmable gain amplifiers 114, 116, and DC offset cancellation elements 118, 120. Among these elements, the programmable gain amplifiers 100, 114, 116 and the low pass filters 106, 108 have gains that are controlled by a gain control section 122, and these gains change continuously in response to various factors such as signal strength. When the signal processed by these elements includes a DC component, a change in gain will produce a corresponding change in the value of the DC component, referred to herein as a dynamic DC offset. The DC offset cancellation elements 110, 112, 118, 120 of the conventional circuit are relatively ineffective for suppressing dynamic DC offset. These elements are typically implemented as simple high pass filters. The dynamic DC offset is essentially a high frequency event, and so the dynamic DC offset propagates through the DC offset cancellation elements 110, 112, 118, 120 and the other circuit elements, and will be received and amplified along with the baseband signal by downstream stages.
FIGS. 4a and 4b show an example of a simulated dynamic DC offset waveform produced by a gain change. FIG. 4a shows the waveform on a scale measured in microseconds. At this scale the dynamic DC offset appears to occur virtually instantaneously. FIG. 4b shows the waveform of FIG. 4a using a scale measured in nanoseconds. At this scale it is seen that a dynamic DC offset of 1 volt occurs in less than 10 nanoseconds. FIGS. 5a and 5b show the simulated response of the DC offset cancellation elements of the conventional circuit of FIG. 1 to the waveform of FIGS. 4a and 4b. As seen in FIGS. 5a and 5b, the conventional DC offset cancellation elements pass the dynamic DC offset in its entirety, causing the direct conversion receiver circuit to have a settling time that is significantly in excess of 20 microseconds, and typically in the range of 100 microseconds. Thus a direct conversion receiver circuit that uses the prior art DC offset cancellation elements is ineffective in canceling dynamic DC offset, allowing dynamic DC offsets of 1 volt or more to be introduced into baseband signals.